Live reprogramming of SDR at FPGA and processor level
Short description: This functionality supports online reprogramming of firmware of embedded processor (ARM, microblaze) and partial area of FPGA.
Hardware platforms on which functionality is supported:
Xilinx Zynq platform: zc706+fmcomms2
USRP X300 series
Testbeds where the functionality can be used:
w.iLab.t; IRIS; ORBIT
Usage policies for accessing software & licensing terms:
The software for this functionality is owned by imec and will be made available as open source software free of charge for Experiments in the context of the ORCA project at least until the end of the ORCA project (June 2020). For use of the software outside or beyond the ORCA project, please contact the software owner (email@example.com) and the coordinator of the ORCA project (Ingrid Moerman, ).
Publications and demonstrations resulting from the use of this software should clearly mention the usage of this functionality and the owner, and refer to the H2020 ORCA Project, even if the publication or demonstration takes place after the end of ORCA project.
Link to technical information: to access code, you need github account and contact imec.